24C32 datasheet на русском

Description
The AT24C32/64 provides 32,768/65,536 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 4096/8192 words of 8 bits each. The device’s cascadable feature allows up to 8 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C32/64 is available in space saving 8-pin JEDEC PDIP, 8-pin and 14-pin JEDEC SOIC, 8-pin EIAJ SOIC, and 8-pin TSSOP packages and is accessed via a 2-wire serial interface.
In addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to 5.5V) and 1.8V (1.8V to 5.5V) versions.

Features
• Low-Voltage and Standard-Voltage Operation
– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
– 2.5 (VCC = 2.5V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
• Low-Power Devices (ISB = 2 µA @ 5.5V) Available
• Internally Organized 4096 x 8, 8192 x 8
• 2-Wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility
• Write Protect Pin for Hardware Data Protection
• 32-Byte Page Write Mode (Partial Page Writes Allowed)
• Self-Timed Write Cycle (10 ms max)
• High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
– ESD Protection: >3,000V
• Automotive Grade and Extended Temperature Devices Available
• 8-Pin JEDEC PDIP, 8-Pin and 14-Pin JEDEC SOIC, 8-Pin EIAJ SOIC,
and 8-pin TSSOP Packages

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DESCRIPTION
The 24C32 and 24C64 are electrically erasable PROM devices that use the standard 2-wire interface for communications. The 24C32 and 24C64 contain a memory array of 32Kbits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages for page write mode.

FEATURES
• Two-Wire Serial Interface, I2CTM Compatible
–Bi-directional data transfer protocol
• Wide Voltage Operation
–Vcc = 1.8V to 5.5V
• 400 KHz (2.5V) and 1MHz (5.0V) Compatible
• Low Power CMOS Technology
–Standby Current less than 6 µA (5.0V)
–Read Current less than 2 mA (5.0V)
–Write Current less than 3 mA (5.0V)
• Hardware Data Protection
–24C32/64: WP protects entire array
–24C32B/64B: WP protects top quarter of
array
• Sequential Read Feature
• Filtered Inputs for Noise Suppression
• Self time write cycle with auto clear
5 ms max.@ 2.5V
• Organization:
–24C32: 4Kx8 (128 pages of 32 bytes)
–24C64: 8Kx8 (256 pages of 32 bytes)
• 32 Byte Page Write Buffer
• High Reliability
–Endurance: 1,000,000 Cycles
–Data Retention: 100 Years
• Full pin-to-pin with ATMEL and MICROCHIP
• 8-pin PDIP, 8-pin SOIC, 8-pin TSSOP, 8-pad
DFN, and 8-pin MSOP packages
• Designed with Samsung technology